University of Houston 3 credits ECE
Prerequisite: None. Limitations in single-threaded processors are forcing new paradigms in software and algorithm development in order to process ever-increasing data sizes. Research and industry applications often require massively parallel systems for simulation, data processing, and data analysis. Several architectures, including nVidia’s CUDA and Intel’s Xeon Phi, provide highly parallel performance at low cost. However, algorithms optimized for massively parallel systems require new design and programming strategies. In this course, we will focus on the design and development of algorithms that take advantage of highly parallel co-processors, such as the nVidia GPU and Xeon Phi, in order to solve research related problems. This course will include an overview of data parallel architectures and principles in programming massively parallel systems.
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