The University of Texas at Austin 3 credits Electrical and Computer Engineering
Explore interconnect and gate modeling; timing analysis; interconnect topology optimization; gate sizing; buffer insertion and sizing; wire sizing and planning; crosstalk analysis and mitigation; clock network synthesis; interconnect planning; modern placement techniques; congestion mitigation; low power optimization; design for manufacturability and reliability; design and computer-aided design (CAD) for emerging technologies. Only one of the following may be counted: Electrical and Computer Engineering 382M (Topic 26), Electrical Engineering 382M (Topic 21), 382M (Topic 26). Pre/Corequisites: Consent of instructor.
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