Drexel University 4 credits CET
This course introduces students to the fundamentals of what goes into the design and testing of a microprocessor core. Through a series of homework assignments and labs, students specify, design, implement, and test a simple IP core RISC microprocessor. The IP core processor is designed by the students using Verilog HDL (and optionally schematic capture), and implemented on a Spartan3 FPGA.
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